With performance of up to 900 million floating - point operations per second ( mflops ) at a clock rate of 150 mhz , tms320c6711 is fit to tackle with the problem . this thesis made a deep research on the h . 263 standard and the tms320c6711 . we propose the plan of the software and the hardware for the realization of the h . 263 protocol which include the structure of the whole program , the c code of the key algorithm of the h . 263 , the c code of some subprogram , and the circuit for image processing with the tms320c6711 as the processor . furthermore , we optimize some subprogram in common use to make the coding more quickly . we encode a video sequence with the tms320c6711dsk successfully , even if the compression rate is as high as 100 , video effect we get after decoding the code stream is satisfying 首先系统地研究了h . 263协议编码器的基本算法，句法，码流结构和tms320c6711dsk的原理结构以及ccs2 . 0的开发环境；在系统的软件方面给出了总体流程图，对于h . 263协议编码器的某些核心算法和子程序，给出了部分源代码，对于dsp的各种代码优化方法进行了讨论，并且对代码进行优化，从而在提高系统处理速度的同时减少代码大小和内存需求量；硬件方面以tms320c6711为核心处理器，提出了基于tms320c6711的图像处理平台的硬件实现方案，并给出了原理电路图；最后在tms320c6711dsk上成功对视频数据进行高压缩比( 100倍以上)的编码，对回传的结果解码后得到了令人满意的效果。
Based on " development of 32 - bit dsp chip in soc and research of design platform technique " ( national high technology research & development program of china ) , this paper is involved with the development of retargetable compiler , the optimization of object code and the verification of compiling system 本文针对作者参加的国家863超大规模集成电路设计重大专项“ soc中32位数字信号处理器芯片开发和设计平台技术研究”项目，对编译系统中的可重定目标编译器和汇编器的设计与开发、目标代码优化以及编译系统的验证进行了研究和探讨。
With the great development of processors technology , compiler optimization techniques take more and more important role in the research of modern processors . not only can appropriate optimization algorithms generate high efficient target code , but also simplify the hardware control mechanism for processors 随着处理器技术的高速发展，编译优化的技术在现代处理器研究中表现出越来越重要的作用，因为合适的代码优化算法不仅可以产生高效率的目标代码，而且可以简化处理器的硬件控制机制。
