At last , the difference between fnpll and npll frequency synthesizer ' s performance is discussed and analyzed theoretically , and it is testified in the experiment 最后，对分数分频与整数频率合成器进行了理论上的分析和比较，并通过实验得到了验证。
Synchronization method and apparatus for the ofdm systems includes three portions of delay conjugate multiplication , phase processing , and edge detection 一种正交分频多工系统之同步方法与装置，主要包含延迟共轭相乘、相位处理，以及边界侦测三个部分。
The pll consists of a crystal oscillator , a ring voltage - control - oscillator , a frequency divider , a phase / frequency detector , a charge pump and a loop filter 设计的电路包括20mhz晶体振荡器,鉴频鉴相器,压控振荡器,固定分频器,电荷泵和低通滤波器。
A synchronization method and apparatus for the ofdm systems includes three portions of delay conjugate multiplication , phase processing , and edge detection 一种正交分频多工系统之同步方法与装置，主要包含延迟共轭相乘、相位处理，以及边界侦测三个部分。
A fpga is used as the controller , performing the necessary processing such as eliminating the head of the encoded data frame , storing the speech data into fifo and transmitting it 控制芯片采用fpga ，完成复位、分频及对已编码帧数据进行去帧头、在fifo中暂存等处理并以低速率发送。
In this paper the author introduce the basic theory of phase locked loop ( pll ) and frequency synthesizer technology , and discusses the theory and implement of fnpll frequency synthesizer 本文介绍了锁相环和频率合成技术的基础理论，并对分数分频频率合成器及其实现技术进行了探讨。
An apparatus and method having a de - interleaving memory and a controller is used for de - interleaving interleaved data in a coded orthogonal frequency division multiplexing receiver 正交编码分频多工接收器中一种具有一反交错记忆体和一控制器，而用来将已交错资料反交错的装置与方法。
It has the advantage of high frequency resolution and low phase noise when compared with traditional integer - n phase locked loop ( npll ) frequency synthesis 分数分频( fnpll )频率合成器则是近年来出现的一种新技术，它与传统的整数分频频率合成器相比具有频率分辨率高、相位噪声低等优点。
