The conventional quadrants sensors mainly have 4 or 8 quadrants , which are not integrated with the signal processing circuits in one chip but are soldered with the discrete signal processing circuits . in this way , it ' s difficult to realize the micromation and system optimization of the devices . in addition , there are few number of photoelectric sensor parts in conventional quadrants sensors , which limits the targets information got from the conventional quadrants sensors 传统的硅象限传感器主要采用四象限，八象限的结构，采用焊接的方式将分别制造的感光象限和电路结合在一起，不能实现感光象限与信号处理电路的单芯片集成，难以实现器件的微型化和系统优化；同时，传统象限传感器的感光象限单元数量较少，获取的目标信息有限，难以实现对目标的坐标位置获取、形状识别等功能。
Mems technology applied in radio frequency communication field , a great of passive devices which could not be integrated , such as atennas , switches , filters , inductors , capacitors , and so on , have had new technique to realize integration and have been excellent quality , so system on - chip ( soc ) will come true Mems技术应用到rf系统中,使大量无法集成的无源器件,如天线、开关、滤波器、电感、电容等,有了新的实现方法和良好的元件性能,从而使单芯片集成( soc )成为可能。
This paper introduces the progress of the cable modem technique and the international standard related to it , gives a project of cable modem firmware design based on docsis / eurodocsis 1 . 1 . as the project is based on the conexant superpipe single ic for cable modem that has a high integration and a programmable mac for docsis / eurodocsis 1 . 1 , it is easy for producer to customize his cable modem system on the conexant project and reduce the cost 本文介绍了cablemodem技术和相关国际标准的发展，并给出了一种符合docsis / eurodocsis1 . 1标准的cablemodem固件设计方案（此设计方案主要基于conexantsuperpipe单芯片cablemodem解决方案） 。 conexantsuperpipe芯片具有高度的集成性，可有效降低成本，而且该芯片具有符合docsis1 . 0 / 1 . 1的可编程的mac层，便于生产厂商在此方案基础上进行二次开发定制自己的cablemodem系统。
The thesis then introduces top - to - bottom schemes , which discuss the functional design of hdtv test pattern signal generator according to the tasks and platform of the system , and develops the function of subsystems . the thesis analyses the theory and mathematic model of hdtv test signal , and studies the signal generating scheme called single - fpga and multi - prom , and describes in detail its key modules such as configuration connecting , prom routing , control and switch timing design and so on . the single - fpga and multi - prom scheme increases the number of prom to reduce the degree of fpga demanded , thus 论文分析了hdtv测试信号的原理及数理模型,提出了一种以单芯片多配置为特色的信号生成方案,并对该方案的配置连接、芯片选路、控制切换时序设计等关键模块进行了详细叙述,该方案以增加配置芯片数量来降低对主芯片要求,不但降低了产品成本,还使各测试信号的代码编写和产生相对独立,有利于合理使用芯片资源,实现多种复杂的hdtv测试信号,缩短开发周期。
On the whole , the main loop draws on the design idea of the full - wave boosting c - dump converter and meets design requirements of power converter . the control loop takes a high speed , high performance tms320lf2407 dsp chip as the control center , so it simplifies peripherals . the control software takes place of hardware circuit to implement the majority of functions , which is designed by means of c and assembly mixed programming 从整体上看，本文设计的主回路充分借鉴了全波升压式c一dump变换器的设计思想，技术可行，满足了电力转换器的设计要求;控制回路的设计以一片高速高性能的tms320lf2407dsp芯片为核心，外围配置简单，控制软件采用c和汇编语言混合编程的设计方法，取代硬件实现了大多数功能，基本达到了单芯片控制的设计目标。
