Chapter 5 and chapter 6 implements some security functions based on the basic data path implemented in the chapter 4 , they are packet filtering and network address transition ( nat ) 第五章和第六章分别在第四章所实现的基本数据通路的基础上实现了一些安全特性，它们是包过滤和网络地址转换（ nat ） 。
Select and verify some algorithms of powerpc603e ' s fpu . design and implemention of the data - path of fpu , with emphasis in design a 64bit multiply - add unit . powerpc603e is a complex microporcessor system ? fpu中数据通路的设计与实现：重点是一个64bit乘加器的实现，包括部分积产生和选择单元、 wallace压缩单元、 161bit加法器。
Firstly , describes the three main functions of the system : building the basic data path , packet filtering , and network address transition ( nat ) as well as the task partitioning of the strongarm core and microengines 首先描述了系统具备的三个主要功能：建立基本数据通路、包过滤和网络地址转换，以及strongarm和微引擎任务的分摊。
In smp also known as " tightly coupled " multiprocessing and a " shared everything " system , processors share memory and the i o bus or data path , and a single copy of the operating system controls the processors 在smp （也称为“紧耦合的（ tightly coupled ） ”多处理和“共享所有”的系统）中，处理器共享内存和i / o总线或者数据通路，由单一的操作系统来控制这些处理器。
A novel 32 bit embedded fix - point superscalar risc core is developed . then we analysis the power dissipation of risc core from view of instruction - set - architecture , datapath , supply voltage and dynamic power optimization 并从系统层次对risc处理器进行功耗分析，分别从改进指令体系结构、处理器数据通路、降低系统工作电压和动态降低功耗四个方面进行低功耗研究。
In the data path , many modules were designed and implemented , such as alu . data bus unit , w ( work register ) and registers file . the designs of peripheral functional modules were finished , including usart , spi and io 在详细分析riscmcu的体系结构特点的前提下，进行了系统划分，并详细设计了该riscmcu的数据通路，包括设计该数据通路上的alu单元、内部数据总线、工作寄存器w以及寄存器文件等功能模块。
Using pipeline technique to accomplish the most important operation in more than one stage , such as sad , which could not be finish in one pipeline stage at any cost . the on - chip memories and data path usually consume most percentage of power in media processor chip 数据通路的功耗也是dsp处理器功耗的重要部分，考虑采用门控时钟技术防止mac模块和alu模块同时工作造成的功耗浪费，最后分析了md32芯片的功耗特征。
Using a multiplexer - based method , the datapath of the multiplier is reconfigurable to perform either one 1024 - bit - multiplication or two 512 - bit multiplications in parallel . the chinese remainder theorem increases the decryption data rate by a factor of 3 . 8 数据通路的设计采用一种基于多选器的动态重构方法，其模乘法器可以执行一个1024位的模乘幂运算，也可以并行执行2个512位的模乘幂运算，从而支持基于中国剩余定理的加速策略。
Test and simulation of amex86 architecture . the dissertation work plays a great significance for studying the military microprocessors with own intellectual property . the research work offers design considerations and technological reserves for further advanced microprocessor designs with amex86 architectures 本文在系统分析的基础上针对该amex86体系结构的特点提出了三总线结构的数据通路，为更好的实现指令间流水提供了有效的保障。
The experimental results indicate that it is feasible to applied at - speed current testing to at89c51 microprocessor at instruction level . through testing of data paths , we can not only detect the faults arose by data path , but also find the faults brought in by control parts 实验结果表明,用全速电流测试在指令级对at89c51微处理器进行测试是可行的,通过测试所有的数据通路,不仅可以检测数据通路的故障,而且可以检测由于控制错误而引起的数据传送错误。
