The soc design approach and analysis method based on dw8051 ip core are employed in this thesis for the intelligent ic card telephone application . this research project focuses on the ip reuse , ip transplant and design verification in the soc design . the thesis begins from the simple description of soc and its present status 本论文正是针对上述原因,主要研究了集成电路中基于dw8051核的智能ic卡话机soc应用系统的设计方法和流程,研究的目的在于揭示soc设计过程中ip复用、移植和设计验证相关问题。
It presents the verification strategy used in the whole eda design flow of the chip . the simulation on module level ( inc . post - layout ) uses the software event - driven simulator , the simulation of the associated modules or whole system uses cycle - based simulator and hardware emulator , for the gate - level netlist produced by using top - down design flow , the sta tool can analyze the static timing , and more formal verification is used to ensure the correct function 本章还提出了系统在整个eda设计流程中的设计验证策略方法：模块级的模拟(包括布线后的模拟)全部采用事件驱动式的软件模拟工具来验证，各大模块的联合模拟及整个芯片的功能验证(寄存器传输级与门级)使用基于周期的模拟工具和硬件仿真器；对于采用top - down的设计方法得到的门级网表使用专门的静态时序分析工具来进行时序分析以及采用形式验证来保证正确的功能。
To provide technology support for outsourcing processing and purchasing during product development period , to establish production & processing technical agreement and purchasing technical agreement , to participate in product design verification , also responsible for establishing plan specifications , test procedures and engineering bom , and completing design records needed for the quality system 对产品开发阶段的外协加工制造和采购提供技术支持，制定制造加工的技术协议和采购技术协议，参与产品设计验证过程并负责设计的规格书编制，检验规程和工程bom编制，按规定完成质量体系要求的设计记录。
After prototyping , and after the product goes though the design refinement cycle when engineers revise and improve the design to meet performance and design requirements and specifications , objective , comprehensive design verification testing ( dvt ) is performed to verify all product specifications , interface standards , oem requirements , and diagnostic commands 经过原型和产品通过设计周期后，当工程师修改和提高设计来满足性能和设计需求和规范、目标、全面的设计验证测试( dvt ) ，执行这些是为了验证所有产品规范、接口标准、 oem需求和诊断命令。
In order to deal with this problem , many verification methods are presented by verification experts . to a certain extent , some methods alleviate the pressure of verification , but no breakthrough on verification is coming . so we have to integrate these methods to make the verification smoother at the present 为解决设计验证的问题,业界提出不少设计验证的方法,在一定程度上缓解了设计验证的问题,如何更好的利用现有技术和工具来建立验证环境是业界普遍关注的焦点和工作的重点。
The designs of the pfd , digital filter ocxo and fractional - n counter in the frequency synthesizer unit are discussed , based on the pll theory . in order to improve the precision of pll , some design methods of pfd are given , and its feasibility is validated by the fpga hardware implement 2 .在锁相理论指导下,第三章讨论了频率合成器设计中的鉴频鉴相器、数字滤波器、恒温压控振荡器和分频电路设计。为了进一步提高频率合成的精度,文中给出了提高鉴频鉴相器性能的一些设计思想,结合fpga的硬件设计验证了其可行性。
