Abstract : ： a technique for carriersynchronization of a digital modem is studied and the results of computer simulations are given . through comp arison of twokinds of phase estimator systems , it is shown that the combination of phase signal decision process and signal decoding processwill improve system performances obviously 文摘:分析了数字调制解调器载波同步技术，提供了计算机模拟测试的结果，并通过对两种不同鉴相器系统的性能比较，说明了把信号相位判断过程与信号解码过程结合，可使系统的性能得到明显改善。
The fourth , mainly talk about the phase noise in the pll , and discuss the specific affect on out put phase noise caused by different components in frequency synthesizer , such as mixer , amplifier , multipler , divider , oscillator , phase detector etc . the last part is about how to choice the natural frequency of pll in order to get the better performance in phase noise 第二章从锁相环的基本原理出发,介绍了锁相环的几个基本部件:鉴相器?环路滤波器和压控振荡器,对线性化锁相环进行了详细的分析,对数字锁相环做了详细的介绍,分析了锁相环的相位噪声模型,讨论了频综中的混频器
Eddy - current sensor conversion circuit consist amplification circuit , band - pass filter circuit , demodulation circuit , differentiation phase and data sampling circuit . these circuits are used to convert the test signal of eddy - current sensor to discrete signal tend to process . the microprocessor system that formed of dsp chip is used to data fitting of test system , data displaying and data communicating with personal computer , etc . the interference questions of hardware design and the measure of eliminating interference signal in the subject are introduced in the last of this chapter 硬件电路的设计主要分三大部分来实现：激励源电路部分，由分频电路和频率合成电路组成，产生频率稳定的激励信号以确保检测任务的正常进行；传感器变换电路部分，由放大电路、滤波电路、检波电路、鉴相电路和数据采集电路组成，主要将电涡流传感器检测线圈检测到的信号变换成只含有被测信息的离散信号，易于后续电路处理；由dsp芯片构成的微处理系统，主要完成检测系统的数据拟合、显示及与主机通信等功能。
Then according to the emphasis of the design , went deeply into the theory of pll frequency synthesizers widely used , described pll ’ s working principle , structure and several types in detail , and made research and analysis of pll frequency synthesizers ’ phase noise , including the effect of the active loop filter on the phase noise , and give some methods to make improvement as well , such as changing loop filter form , reducing divide number , and increase phase detector frequency , etc . then paper introduced the principle character and phase noise analysis of direct digital frequency synthesizer ( dds ) and injection phase lock circuit , which are also important circuits in the design 论文首先对几十年频率合成器的发展进行概述,而后针对本次设计的重点,对应用较为广泛的锁相频率合成理论进行了深入的探讨,详细介绍了锁相环的工作原理、组成结构和锁相类型,并对锁相频率合成器的相噪特性进行了研究分析,包括有源环路滤波器对于相噪的影响,提出了改善相位噪声的几点措施:改善环路形式、降低分频数、增大鉴相频率等。接着介绍了直接数字频率合成器( dds )和注入锁相电路的原理特点以及相噪分析,它们也是本次设计的重要电路。
Firstly , computer model of mdrlg is set up for simulation purpose . by simulation about the two output signals of mdrlg , four basic waveforms between the two signals in lock - in area are found out and the fact is discovered that the old phase - demodulation circuit introduces errors when it is used for demodulating two of the four basic waveforms 本文首先建立了机抖陀螺的计算机仿真模型，利用该模型对陀螺两路计数信号及原有鉴相电路进行了仿真，发现两路计数信号过锁区时存在四种基本波形，且原有鉴相电路对其中两种波形产生鉴相误差。
In this paper we also provide some experimental results to prove the feasibility of three dimensional range imaging , the reliability of correlative phase discriminator based on ccd , the practicability of range image receive system based on mcp image intensifier and the improvements of the system 并且通过一系列实验验证了正弦波与方波并行相关鉴相测距原理的可行性，基于ccd的并行相关鉴相器的可靠性，以及基于mcp像增强器和ccd摄像机的三维成像鉴相接收子系统的实用性。
Through all the works above , this paper summarizes the technique to analyse the phase - detector type circuits with orcad / pspice9 software , especially it ? function of parameter sweep and performance analysis ; summes up the ways and means to optimize phase - detector type circuits with orcadipspice9 ? optimizer module 通过上述工作，本论文总结了用orcad pspice9特别是其参数扫描和性能分析功能分析鉴相器一类电路的方法；概括出了用其优化模块optimizer和性能分析功能对鉴相器一类电路进行优化设计的步骤和思路。
The main task including : when the raster ruler and axis - angle coder move forward or backward , they will bring pulse signals which are length signals and angle signals . these signals will be sent to signal processing circuits to be pretreated . then the signals will be sent to direction differentiation circuits to differentiate the directions 主要完成以下任务：把光栅尺和轴角编码器前进或后退产生的长度信号和角度信号，送信号处理电路进行处理，再送鉴相倍频电路进行鉴相处理，送单片机计数，由另一片单片机把计数的结果数据经过串行通讯电路送至pc主机去进行处理。
The main contribution of the thesis is seen as follows : aiming at the fault with slow speed and high power dissipation of the conventional phase - frequency detector , a high speed and low power dissipation phase - frequency detector is designed by modifying the structure of the single phase lock dynamic d flip - flop and adding the delay cell in the feedback loop to eliminate the phase detector ’ s dead zone effectively 论文的主要贡献为以下几个方面: 1 .针对传统鉴频鉴相器速度慢、功耗高的缺点,改进了单相时钟动态d触发器的结构,设计出了一种高速低功耗的鉴频鉴相器,在反馈回路上加入延迟单元,能有效的消除鉴相死区。
