后端设计的英文

• back and design

• "后端"英文翻译    after end; rear-end; trailin ...
• "设计"英文翻译    devise; project; plan; desig ...
• "前端设计" 英文翻译 :    front end design
• "卷尾式末端设计" 英文翻译 :    curved end-terminal design
• "后端" 英文翻译 :    after end; rear-end; trailing end
• "后端，后台" 英文翻译 :    backend
• "后端板" 英文翻译 :    back end plate; back endplate
• "后端壁" 英文翻译 :    aft blukhead; aft bulkhead; aft end bulkhead
• "后端的" 英文翻译 :    aft
• "后端点" 英文翻译 :    aft terminal
• "后端盖" 英文翻译 :    commutator(sliring)end bearing bracket; commutatorend bearing bracket; dirve end baring bracket; rear housing
• "后端机" 英文翻译 :    back end processor; backend processor; backend machine; backendmachine
• "后端棘" 英文翻译 :    spina posterior
• "后端面" 英文翻译 :    aft end face; back face
• "后端墙" 英文翻译 :    gable wall; rear end wall
• "后端头" 英文翻译 :    follower head
• "后端网" 英文翻译 :    back-end network
• "后端罩" 英文翻译 :    rear head
• "脾后端" 英文翻译 :    extremitas posterior lienis; posterior extremity of spleen
• "尾部, 后端" 英文翻译 :    aft end
• "最后端" 英文翻译 :    rearmost end
• "处理后端" 英文翻译 :    vpbe
• "船首楼后端" 英文翻译 :    break of forecastle
• "船尾端后端" 英文翻译 :    afterend
• "磁极后端" 英文翻译 :    trailing pole-tip

• Back and design
  后端设计
• Route : the final step of the whole design , each cell in design is connected by net
  6 .绕线阶段是芯片后端设计的最后一个阶段,完成单元之间的连线。
• This paper presents the physical implementation process of the digital asic for the wireless endoscope by eda tools
  文中给出了利用后端设计的eda工具对无线内窥镜系统胶囊内数字集成电路进行物理实现的过程。
• In the paper , we will focus on the digital module backend design , which is one of important application fields of ic
  本文详细介绍了,数字机顶盒芯片的数字模块后端设计工作,从得到门级网表到交出gdsii研究开发的全过程。
• The thesis proposed a new back - end design method , which is a design flow combines physical compiler and silicon ensemble effectively
  文中提出了一种后端设计的新方法，即physicalcompiler综合和siliconensemble布局布线有效结合的设计流程。
• In this article , i introduced a layout design flow of coprocessor that is compatible with the intel m80c287 according to the full - custom ic backend design methodology
  本论文按照全定制ic的后端设计流程，即基本单元版图库建立、版图布局设计、布线设计以及版图设计验证和后仿真。
• The transistor count is 3 . 8 million ; the package is surface mount 240 - pin quad flat pack ( qfp240 ) ; and the die size is 98mm2 ; the most advanced research progress on microprocessor architecture is extensively studied to get technical preparations for microprocessor design
  该处理器目前正在进行后端设计，即将采用0 . 25 mcmos工艺流片，整个处理器的晶体管数目为380万，封装形式是qfp240 ， die面积为98mm ~ 2 。
• Adopts vdsm process technology however two outstanding problems are faced to ic layout design when the feature size reaches to 0 . 18 m or lower : 1 . timing convergence problem seriously affects the circuits schedule , and the interconnect - delay has exceeded more than 70 % of the total circuits ’ delay . 2 . si problem , usually it consists two aspects of ir - drop and crosstalk . these problems often affect the chip function after tapout
  本篇论文就是针对超深亚微米阶段soc芯片后端设计所面临的挑战,提出了运用连续收敛的布局布线策略,尤其是虚拟原型的设计理论,来快速验证布局,进而提高布线的成功率,并且提出了一种改进的布局评估模型,提高对soc芯片预测布线的准确度;同时,对于时钟驱动元件选择,文中提出了一种基于正态分布模型来达到更有效的选取。
• The paper is composed by three parts ; we ' ll introduce the background of ic design in the first part , which also covers the developing in domestic and foreign industry ; the whole flow of digital ic backend design will be presented detailed in the second part ; the last part will summarize the paper , as well as discuss the future work
  这篇论文主要包括如下三个部分:第一部分为绪论,主要关于国内外行业相关背景,以及课题背景;第二部分为数字后端设计开发过程,分为设计的初始化,时序设置,芯片布局,标准单元摆放,时钟树综合,绕线,物理验证。
• The design flow includes the construction of basic cell libraries , placing & routing , layout verification and post - layout simulation , etc . moreover , the layout design of basic cells and functional modules , the measures of circuit protection and methods to reduce the parasitic effect are also been discussed
  这个流程介绍了与intelm80c287协处理器完全兼容的协处理器的后端设计过程。介绍了协处理器设计过程中基本单元和一些主要功能模块的设计，以及设计中的保护措施和减少寄生效应的设计方法。