状态寄存器的英文
发音:
"状态寄存器"怎么读用"状态寄存器"造句
英文翻译手机版
- bit status register
- command status register
- state register
- stator register
- str status register
- "状态"英文翻译 status; state; condition; st ...
- "寄存器"英文翻译 register; tell-table; tempor ...
- "位状态寄存器" 英文翻译 : bit status register
- "程序状态寄存器" 英文翻译 : program status register
- "处理机状态寄存器" 英文翻译 : processor state register; processor status register
- "错误状态寄存器" 英文翻译 : error status register
- "当前状态寄存器" 英文翻译 : current status register
- "翻译状态寄存器" 英文翻译 : translation-state register
- "方式状态寄存器" 英文翻译 : mode status register
- "和复位状态寄存器" 英文翻译 : rsr―reset status register
- "基本状态寄存器" 英文翻译 : basic status register
- "机器状态寄存器" 英文翻译 : machine status register
- "控制和状态寄存器" 英文翻译 : csr
- "控制状态寄存器" 英文翻译 : control status register
- "命令和状态寄存器" 英文翻译 : csr
- "命令状态寄存器" 英文翻译 : command status register
- "设备状态寄存器" 英文翻译 : dsr device status register
- "输出状态寄存器" 英文翻译 : osr output status register
- "输入状态寄存器" 英文翻译 : input status register
- "系统状态寄存器" 英文翻译 : system status register
- "现役状态寄存器" 英文翻译 : active status register
- "中断状态寄存器" 英文翻译 : interrupt status register
- "装入状态寄存器" 英文翻译 : load status register
- "动态寄存器" 英文翻译 : dynamic register; ring register
- "静态寄存器" 英文翻译 : static register; staticregister
例句与用法
- Bit status register
位状态寄存器 - Csr information technology - microprocessor systems - control and status registers architecture for microcomputer buses
信息技术.微处理机系统.微机总线用控制与状态寄存器 - A method of inte * * cing with hardware that involves repeatedly reading a status register until the device has reached the awaited state
一种硬件交互方法,不断读状态寄存器,直到设备进入等待状态。 - A method of interfacing with hardware that involves repeatedly reading a status register until the device has reached the awaited state
一种硬件交互方法,不断读状态寄存器,直到设备进入等待状态。 - Qe1 achieve the whole synchronization by software and hardware . during the course of the initialization of the qe1 system , the chip pm4354 can accomplish the task of synchronization of bit , frame and multiframe after the chip initialization by the software . after pm4354 accomplishes the bit synchronization , qel will read the status registers of the pm4354 to get the status of each el circuit and choose recovered clock of the specified the el circuit as the external timing source of the whole htc - 5200an equipment
Qe1系统在系统初始化时,通过软件完成对硬件芯片pm4354的初始化工作后,便可利用该芯片完成4路e1的同步(位同步、帧同步和复帧同步) ;在pm4354完成时钟提取的任务后, qe1通过不断地访问pm4354的状态寄存器,获得每路e1的状态信息,在时钟源的选择原则下,选择指定e1线路的恢复时钟作为整个htc - 5200an节点设备的外部参考时钟,从而解决了htc 5200an的中继板卡由e1变为qe时所带来的网同步时钟源。 - For the real time performance need of the low speed speech compress algorithm and the asic implement of the transfer process between programs , the design is put forward in the paper , in which state registers control the cross access between operator and memory , register windows are used for the parameters transfer , and the technique of hardware controlling is used to avoid pipeline conflict , so that the main problems of the transfer process in tr600 are solved effectively
摘要针对低速率语音压缩算法对处理器系统实时处理复杂运算的性能要求,就程序调用过程的asic实现问题进行了对比与分析,进而提出了用层次状态寄存器控制存取算子对存储体交叉访问的方法,并结合运用寄存器窗口传递参数的功能,以及利用空指令硬布线处理流水线冲突的方法,有效地解决了tr600芯片中调用过程存在的主要问题。
其他语种
- 状态寄存器的日语:ステートレジスタ じょうたいレジスタ ステータスレジスタ
相关词汇
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