asip中文是什么意思
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用"asip"造句"asip"怎么读"asip" in a sentence
中文翻译手机版
- 阿西普
- 可感信息处理量
- "asipa" 中文翻译 : 阿西帕
- "asiostylops" 中文翻译 : 亚洲柱齿兽属
- "asipenko" 中文翻译 : 阿西片科
- "asioproductus" 中文翻译 : 亚洲长身贝属
- "asiphonate" 中文翻译 : 无吸管的,无管类
- "asion" 中文翻译 : 亚迅
- "asiphonogamae" 中文翻译 : 无粉管植物
- "asioli" 中文翻译 : 阿肖利
- "asipi" 中文翻译 : 美洲国家工业资产协会
- "asiof" 中文翻译 : 高等长石研究会
例句与用法
- And asip ( application - specific instruction set processor ) based on risc core is the key to integrate other system
而基于risc核的专用指令处理器( application - specificinstructionsetprocessor )是构成其它更大系统的关键。 - Furthermore , this chapter analyzes the method and critical technique of the hardware / software co - design in general system and some concrete applications in this chip
最后以rs译码器的实现为例来具体说明基于asip的软硬件协同设计的主要过程,也对asip的构造和应用进行了分析。 - After that , the chapter illuminates the asic project of synchronization . at last , the chart demonstrates two different implementation schemes that are hardware and asip ( application specific integrated processor ) for field sync correlative calculation
之后阐述了同步的asic实现,其中以场同步相关运算为例,提出了硬件及asip (应用专门指令集合处理器)的两种实现方案,并对两种方案进行比较。 - Then , the paper introduces asip . the five key steps in asip design is presented . 1 applied design methodology based on synthesis to the design of simple asip , moreover , coding styles is used in comparison of asips about timing and areac
在此基础上,介绍了asip的设计方法,详细地描述了基于综合的设计方法在简单asip的设计的应用、 asip的硬件实现,并把不同编码风格应用于asip设计,进行了比较。 - To solve the problem of exponential space in the instruction - set automated design for the application specific instruction set processor ( asip ) , a formular clustering integer linear programming model ( cim ) is proposed , which can decrease the exploration space effectively utilizing function dependencies between instructions
摘要提出集束式整数线性规划形式化模型,利用指令间的功能依赖性解决专用指令集处理器中指令集自动定制的指数性空间问题。 - This paper mainly focuses on the following three field : system structure , system hw / sw ( hardware / software ) partition . synthesis and verification . and presents a hw / sw co - design method based on ip ( intellectual property ) core . we use this method to design asip , and verify this virtual machine using instruction codes , ac - 3 codes and ts ( transport stream ) flow
本文从芯片系统的整体入手,重点从系统的结构、软硬件分割以及芯片系统的设计验证三个方面对该芯片系统的设计做了深入的研究,提出了一种基于ip核的软硬件协同设计方法,运用该方法对asip进行设计,并采用虚拟机的模型,采用指令集程序、 ac - 3解码程序、 ts流程序进行仿真验证。 - Finally the design of rs decoder in this chip is described as an example of the hardware / software co - design based on asip , the construction and application of asip is also analyzed . the fourth chapter introduces the design flow using eda tools based on standard cell , then it presents the dft of this chip in detail which uses following techniques : full scan , bist and boundary scan to improve the fault coverage
第四章,在对本芯片的基于标准单元eda设计流程进行了简要说明基础上,对本芯片采用的可测试性设计进行了详细的分析和说明,本芯片中有机结合了多种可测试性设计技术:基于全扫描的方式、 bist测试技术、边界扫描技术,保证了很高的测试故障覆盖率。
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