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异步串行通信的英文

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"异步串行通信"怎么读用"异步串行通信"造句

英文翻译手机手机版

  • asynchronous serial communication

例句与用法

  • Realization of tms320c6711 ' s uart communication based on tl16c550c
    6711的异步串行通信
  • Design of asynchronous serial communication between pic microcontrollers and pc
    异步串行通信的设计
  • Analyzing the baud rate setting principle in asynchronous serial communication
    浅析异步串行通信中波特率的设置原则
  • It used parallel correspondence andthe asynchronous serial communication between the upper position machine andthe lower position machine
    上下位机之间的通信采用了并行通信和异步串行通信两种方式。
  • Finally in the developing environment of hardware , the program of the asynchronous serial communication between the in vehicle unit and the palm is given and debugged
    最后在硬件开发环境下,对车载单元和掌上电脑之间的异步串行通信进行了编程和调试。
  • The hardware design and debugging are finished . 3 . an asynchronous serial communication protocol based on rs - 232c is designed to realize the data communication between the pc and the system
    3 .完成了基于rs - 232c标准异步串行通信协议的设计,实现了系统回波数据与pc机之间的数据交换。
  • Using seriel communication mode though rs232c and rs485 interface , we can do near and far distance communicate with the upper microcomputer ( pc ) or mcu , whereby measured systym can be monitored on real - time
    采用异步串行通信方式,通过rs232c或rs485接口,与计算机进行近地、远地通信,从而对被测系统实时监测。
  • In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ) . processor and uart ( universal asynchronous receiver transmitter ) , these cores are used in this dissertation , fpu is used for floating point complex fft processor , uart is used for fft processor " s peripheral and our test platform . in chapter 6 we discuss the design for testability , including atpg , bist and jtag method , discuss the different verification and simulation strategy in soc scale facing to different modules , build up the test platform which is used to test high performance application specified digital signal processing processor . in chapter 7 we summarize the research results and creative points , and point out the further work need to do in the future
    第五章提出了基于ieee754浮点标准的浮点运算处理器的设计和异步串行通信核的设一浙江大学博士学位论文计,提出了适合硬件实现的浮点乘除法、加减运算的结构,浮点运算处理器主要用于高速fft浮点处理功能,异步串行通信核主要用于pft处理器ip核的外围扩展模块以及本文所做的验证测试平台中的数据接口部分第六章提出了面向系统级芯片的可测试性设计包括了基于扫描测试atpg 、内建自测试bist 、边界扫描测试jtag设计,在讨论可测试性设计策略选择的问题上,提出了针对不同模块进行的分别测试策略,提出了层次化jtag测试方法和扫描总线法,提出了基于fpga
  • The thesis has two main parts . the first is the hardware design , which mainly uses the method of cpld and vhdl , design a circuitry with the trim , inspection , control , asynchronous serial communication , at last with rs - 485 difference transmittal mode outputs the inspection results to the pc ' s rs - 232
    第一部分为硬件电路设计,采用了cpld器件和vhdl进行设计,通过vhdl描述,设计了整形、检测、控制、异步串行通信为一体的电路,最后,检测结果通过rs - 485差分传送方式输出到计算机的rs - 232串行口上。
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