硬件设计语言的英文

发音:

"硬件设计语言"怎么读用"硬件设计语言"造句

英文翻译手机版

hardware design language

"硬件"英文翻译 hardware
"设计"英文翻译 devise; project; plan; desig ...
"语言"英文翻译 language
"硬件设计语言与原型化" 英文翻译 : i ii iii ece hardware design language and prototyping
"硬件程序设计语言" 英文翻译 : hardware programming language
"硬件设计" 英文翻译 : hardware design
"硬件设计师" 英文翻译 : hardware designers
"设计语言" 英文翻译 : design language
"适宜的硬件设计" 英文翻译 : proper hardware design
"程式设计语言" 英文翻译 : programming language
"程序设计语言" 英文翻译 : a programming language; languages of program design; pdl; pl; program design language; program language; programme design language; programmed language; the c programming language
"电脑设计语言。" 英文翻译 : computer design language
"仿真设计语言" 英文翻译 : emulation design language
"过程设计语言" 英文翻译 : process design language
"结构设计语言" 英文翻译 : structural design language
"数字设计语言" 英文翻译 : ddl digital design language; digital design language
"算法设计语言" 英文翻译 : algorithmic design language
"系统设计语言" 英文翻译 : system design language; systematic design language
"诊断设计语言" 英文翻译 : ddl diagnostic design language
"语言专用设计语言" 英文翻译 : lsdl language specific design language
"程序设计语言设计" 英文翻译 : programming language design
"系统，减少硬件设计成本，所以" 英文翻译 : pal
"硬件和软件设计人员" 英文翻译 : hardware and software designers
"ada程序设计语言" 英文翻译 : ada
"c 程序设计语言" 英文翻译 : c programming language

例句与用法

Specification for the representation of quality rules and metrics for hardware and software design languages
软件和硬件设计语言的质量规则和度量表示的规范
It is an important character that using hdl describes function and behavior of logic device or system hardware
使用硬件设计语言来描述逻辑器件及系统硬件的功能和行为是硬件描述语言编程设计方法的一个重要特征。
3 ) design switch system using eda based on the result of a11alysis . because the function of switch system is very complicated , some modules are designed by schematics directly , most modules are designed by verilog hdl using eda technology , synthesized by the synopsys software . at last a high speed atm switch system is designed , including voq as input buffer strategy dpa cell scheduling algorithm and crossbar switch fabric
在前面分析的基础上根据目前的条件，对一个空分交换系统各模块进行前端设计和仿真，由于交换系统的功能复杂，我们一部分将采用直接画原理图的方法进行设计，大部分将采用集成电路设计自动化的方法进行设计，即采用硬件设计语言verilog ? hdl进行设计，用synopsys软件对设计进行综合，生成线路图，然后作门级电路仿真。