缓存区的英文

• cache region

• "缓"英文翻译    slow; unhurried
• "存"英文翻译    exist; live; survive
• "区"英文翻译    H region; H
• "最小目录超速缓存区" 英文翻译 :    minimum directory cache buffers
• "缓存" 英文翻译 :    buffer; cache
• "保存区" 英文翻译 :    holding area; save area; storage
• "储存区" 英文翻译 :    storage area; storage zone
• "快存区" 英文翻译 :    resolver
• "内存区" 英文翻译 :    memory field
• "暂存区" 英文翻译 :    scratch pad area; working area; working storage area
• "主存区" 英文翻译 :    main storage region
• "贮存区" 英文翻译 :    buffer storage area; stockpiling area; storage area
• "包缓存" 英文翻译 :    packet caching
• "点缓存" 英文翻译 :    point cache
• "缓存器" 英文翻译 :    buffer
• "缓存值" 英文翻译 :    cache size
• "双缓存" 英文翻译 :    double buffer
• "分组缓存,包缓存" 英文翻译 :    packet caching
• "保存区表" 英文翻译 :    save area table; saveareatablesavt
• "保存区段" 英文翻译 :    conserved domain
• "保护区, 保存区" 英文翻译 :    conservation zone
• "报文保存区" 英文翻译 :    message retention area
• "标号保存区" 英文翻译 :    label save area
• "常数暂存区" 英文翻译 :    constant workspace
• "储存区域" 英文翻译 :    storage area network

• Data that has not been used for a while is eventually released from the cache to make room for new data
  如果数据一段时间未被使用，将最终从高速缓存区释放，将由新的数据代替。
• Dtlb data translation look - aside buffer . performs the translation from linear addresses to physical address required for support of virtual memory
  数据翻译旁视缓存区执行从线性地址到物理地址的翻译时要有虚拟内存的支持。
• Depending on the settings for the particular game , the buffer zone could be 3x3 ( three squares wide and three squares tall ) or 5x5 , or even larger
  缓存区可以保护本队队旗不那么容易被敌人抢走（因为敌人要先占领了相邻的区域才能抢走旗子） ，缓存区大小由具体游戏设定，可以是3 * 3 , 5 * 5或者更大。
• If data is requested and is in the cache ( a phenomenon called a cache hit ) , the data is retrieved from the cache , avoiding having to retrieve it from memory or disk
  如果数据被请求，并且数据在高速缓存区（这种情况就是高速缓存区命中） ，就直接从高速缓存区读取，而不需要从内存或者磁盘读取。
• The framework generalizes the necessary steps of common radar processing , and solves the key problems of data registration , double - buffer storage , besides the data competition arbitration , and provides the ability of built - in parallel computation
  该程序框架概括了一般雷达处理流程的必要步骤，解决了数据注册技术、双缓存区存储技术和数据竞争仲裁等关键技术问题，提供了内建的雷达并行处理能力。
• The concept " equivalent service time " is used to describe our model and then the system can obtain the good performance without loss of any store resources . 2 . a novel mac protocol for ad hoc network ~ fa _ maca ( flow adaptive multiple access with collision avoidance ) is presented
  而且，通过对最佳缓存模型的设计，可以在保证系统的qos要求的情况下，提供最合适的发送缓存区大小，有效的降低不必要的资源浪费。
• It takes spatial data cache technology to establish the large capacity cache area for the backstage database , and to cushion customers ’ visiting request to the database , so as to reduce the frequency of the server access . in this way , the searching efficiency of the database system shall be improved
  利用空间数据缓存技术,为后台数据库设置大容量的缓存区,用于缓冲客户对数据库的访问请求,减少对服务器访问次数,从而提高数据库系统的检索效率。
• Secondly , the paper describe the principle of atm network , and the function of ' sar " ( segmentation and reassembly ) and the format of packet aal5 , and introduce the basic idea of ipoa , and the design project and implementing of the control chip . later , the paper introduce the logic function and operational principle of packet buffer control chip and prove the feasibity and correctness of the arithmetic . at last the paper introduce crc - 32 arithmetic based on look up and implement it with hardware
  接着详细论述了核心路由器atm网络实现的原理，包括“ sar ” ( segmentationandreassembly )功能和aal5报文的格式， ipoa基本思想，以及控制芯片的设计方案和实现途径等。然后又论述报文缓存区控制芯片的工作原理和逻辑功能等，并对算法的可行性，正确性等进行论证。最后介绍了一种基于查表的crc - 32算法的原理及其硬件实现。