负载电容的英文
发音:
"负载电容"怎么读用"负载电容"造句
英文翻译手机版
- load capacitor
- "负载"英文翻译 load
- "电容"英文翻译 electric capacity; capacitan ...
- "负载电容器" 英文翻译 : load capacitor; load condenser
- "封装引线间电容和引线负载电容测试方法" 英文翻译 : the method of measuring the leadtolead and loading capacitance of package leadsds
- "负载电机" 英文翻译 : load motor
- "负载电缆" 英文翻译 : loaded cable
- "负载电流" 英文翻译 : load current; load-current
- "负载电流表" 英文翻译 : load-current meter
- "负载电流计" 英文翻译 : load-current meter
- "负载电路" 英文翻译 : load circuit
- "负载电门" 英文翻译 : load switch
- "负载电刷" 英文翻译 : on-load brush
- "负载电压" 英文翻译 : on-load voltage
- "负载电阻" 英文翻译 : load resistance; loading resistance; loading resistor; pull up resistor; pull-uresistor
- "负载电阻器" 英文翻译 : loading resistor; pull-up resistor
- "过负载电平" 英文翻译 : overload lever
- "假负载电阻" 英文翻译 : dummy resistance
- "满负载电流" 英文翻译 : full load current
- "双负载电路" 英文翻译 : twin load circuit
- "外负载电路" 英文翻译 : external load circuit
- "无负载电缆" 英文翻译 : non-loaded cable
- "无负载电路" 英文翻译 : unloaded circuit
- "无负载电压" 英文翻译 : non-load voltage
- "加载电容器" 英文翻译 : loading condenser
- "板极负载电阻" 英文翻译 : plate load resistance
例句与用法
- The method measuring the lead - to - lead and loading capacitance of package leads
封装引线间电容和引线负载电容测试方法 - The load capacitance cl is the capacitive load of the oscillating circuit as seen from the pins of the crystal
我理解为:负载电容cl是指从晶体两脚往芯片里看的振荡电路的电容负载。 - Sub - array and subsection decoding reduce the load capacitance of bit line and word line and enhance the speed of sram simultaneously
存储阵列分块技术以及分段译码技术降低了sram位线和字线的负载电容,从而提高了sram的速度。 - Low power design of the hardware is divided into two levels : device level and system level . in device level , low power design mainly focuses on decreasing load capacity and leaking current
硬件低功耗设计有两个层次:器件级的低层次设计主要关注减少负载电容和漏电流;系统级的高层次设计主要关注减少无用的逻辑和无用的电路活动。 - Output buffer is realized by the feedback application of amplifier which can drive big load capacitor . the av of amplifier is more than 70db , phase - margin of it is more than 70 degree , psrr of it is more than 50db
单位增益缓冲器是具有驱动大负载电容能力的运算放大器的反馈应用,该运算放大器的增益大于70db ,相位裕度大于70度。 - Dynamic power is dominant component of the average power dissipation in cmos circuits . and the value of dynamic power is determined by node capacitance , supply voltage , clock frequency and switching activity of cmos circuits . so most low power designs are achieved by reducing one or more those above parameters
由于cmos电路的功耗与cmos电路的负载电容,电压,时钟频率及开关活动性有关,因此在低功耗cmos触发器设计过程中,许多低功耗设计技术都可以归结到通过减小上面的参数来达到低功耗的目的。 - Five different structures are described : standard transformer coupling , parafeed , resistively loaded stage capacitively coupled to the output transformer , tube ( valve ) based constant current source load capacitively coupled to the output transformer , and solid state ( mos fet ) constant current source load capacitively coupled to the output transformer
我们将讨论五种不同的方式:标准变压器耦合;旁馈耦合;电阻性负载电容性耦合至输出变压器;胆恒流源负载电容性耦合至输出变压器;以及晶体管恒流源负载电容性耦合至输出变压器。
其他语种
- 负载电容的日语:ふかコンデンサ
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