超标量结构的英文

• superscalar architecture

• "量"英文翻译    measure capacity
• "结构"英文翻译    structure; composition; cons ...
• "超标量体系结构" 英文翻译 :    superscalar
• "超标量" 英文翻译 :    superscalar; superscale
• "统一超标量著色结构" 英文翻译 :    unified superscalar shader architecture
• "标量结果" 英文翻译 :    scalar result
• "超标量渲染" 英文翻译 :    superscaler rendering
• "定量结构" 英文翻译 :    d-m (determiner-measure) construction; d-m construction
• "流量结构" 英文翻译 :    traffic mix
• "生物量结构" 英文翻译 :    biomass structure
• "向量结构" 英文翻译 :    vector structure
• "大热容量结构" 英文翻译 :    thermally massive structure
• "任务变量结构" 英文翻译 :    structure of task variable
• "轻量结构混凝土" 英文翻译 :    lightweight structural concrete
• "最小重量结构分析" 英文翻译 :    minimum weight analysis
• "超标" 英文翻译 :    erta's exceeding limits erta's
• "动量结构-药代动力学关系" 英文翻译 :    quantitative structure-pharmacokinetics relationship
• "sparc标量处理器结构" 英文翻译 :    scalar processor architecture
• "标量" 英文翻译 :    [物理学] (无向量) scalar; invariant; scalar quantity◇标量变量 scalar variable
• "sparc标量处理器结构, sparc处理器" 英文翻译 :    scalar processor architecture
• "定量构效关系,定量结构活性关系" 英文翻译 :    quantitative structure-activity relationship
• "观点看待人体精微能量结构" 英文翻译 :    the subtle anatomy of man
• "测量结" 英文翻译 :    measuring junction
• "超标(货物)" 英文翻译 :    out of gauge
• "超标度" 英文翻译 :    hyperscaling

• Compared to its commercial counterparts , the proposed scheme can improve the instruction throughput by 23 % , while maintaining the hardware and power consumption
  实验表明，相比商业化的处理器，该策略下的超标量结构在保持电路和功耗开销的同时，指令吞吐率平均有23 %的提高。
• In a multithreaded microprocessor which has a superscalar execution core , with the issue width being larger and the pipeline getting deeper , the misprediction penalty will become longer
  在执行单元为超标量结构的多线程处理器中，转移误预测损失会随着指令发射带宽和流水线级数的增加而增加。
• Nowadays , all of the microprocessor designs are often based on the superscalar technology , which has little room for improving performance more due to its two limitations : hard to realize and low resources utilization
  当前的处理器主流技术超标量结构由于实现非常复杂和资源利用率低的缺陷而难以再大幅度提高其性能。
• With such research background , this dissertation focuses on the research of hardware techniques for thread level parallelism in high performance microprocessors , especially the multithreaded microprocessor which has superscalar execution core
  在这种背景下，本文研究支持线程级并行的硬件技术，尤其是执行单元为超标量结构的多线程处理器。
• Firstly , for the purpose of research and verification of multithread microprocessor , a superscalar microprocessor model armp - v2 is built on the basis of armp microprocessor ; secondly , the issue logic is not only the critical path in a superscalar microprocessor , but also critical to the performance of a multithreaded microprocessor with superscalar execution core
  首先，在设计的嵌入式微处理armp的基础上进行改进，提出了一个超标量处理器模型，用于多线程处理器系统结构的研究与验证。其次，指令发射逻辑是超标量处理器中的关键路径，也是制约执行单元为超标量结构的多线程处理器主频提高的关键因素。
• Smpdca architecture has six outstanding excellences : complexity of the control logics of smpdca is lower than large scale superscalar ; supplying shortest inter - processor communication latency using the shared li data cache ; no cost to maintain cache coherence ; hit rate of data cache increase ; easy to reuse many softwares of symmetric multiprocessor ( smp ) ; exploit the parallelism of applications from many levels . this paper present the architecture model of smpdca , and illustrated its function units , and discussed its key techniques , and analyzed the address image policy of multi - ported cache
  Smpdca结构具有六个突出优势：相对于大规模的超标量结构而言， smpdca结构的控制逻辑复杂性明显要低得多；相对于通过共享主存来实现处理器之间的通信的结构而言，通过一个共享的第一级数据cache来实现处理器之间的通信的smpdca结构能够提供非常小的处理器之间的通信延迟；没有cache一致性维护开销；数据cache命中率提高；便于smp (对称多处理器结构)的软件重用；从多个层次上开发程序的并行性。