Optimize synchronous sequential circuit with retiming was introduced by leiserson and saxe in 1983 , and retiming optimizational algorithm was summarized comprehensively in 1991 Leiserson和saxe于1983年提出了利用重定时优化同步时序电路,并于1991年对重定时优化算法做了全面的总结。
The automatic test vector generation method based on fault simulation is described , and the whole procedure of atpg of sequential circuits is analyzed , fault simulator - hope as an example 本文阐述了基于模拟的自动测试生成方法,以故障模拟器? hope为例分析了整个时序电路自动测试生成过程。
In order to eliminate the sequence conflict of synchronous sequential circuit and shorten the designable time of integrated circuits , the algorithms of retiming is deeply researched in this paper 本文对重定时算法进行了深入研究,目的在于消除同步时序电路的时序冲突,从而缩短集成电路的设计时间。
To avoid the idleness state and the corresponding power dissipation in sequential circuits , a clock gating technique and a multi - code assignment using redundant state is adanced to reduce power dissipation 为抑制时序电路中的冗余现象,研究了时序电路的门控时钟技术,并利用t型触发器进行时序电路设计。
Base on the existing synchronous sequential circuits fault simulator - hope , the test vector generation method of sequential circuits based on ant algorithm is systematically researched firstly 本文在同步时序电路故障模拟器? hope的基础上,率先对基于蚂蚁算法的时序电路测试矢量生成方法作了系统的开拓性研究。
As emphasis , we propose a new backward width - flrst search circuit partitioning method with flip - flop as core for synchronous sequential circuits . and then based on it , we develop a new circuit parallel tg algorithm 最后重点对电路并行方法进行了研究,提出了一种新的以触发器为核且消除大功能块之间反馈的宽度优先反向搜索同步时序电路划分方法。
The basic principle of ant algorithm is discussed , ant algorithm for sequential circuits initialization is presented , and the pheromone computation formula for sequential circuits initialization and status transfer rules are given 根据蚂蚁算法的基本原理,提出了基于蚂蚁算法的时序电路初始化方法,给出了针对时序电路初始化的信息素计算公式和状态转移规则。
Model - checking is one of the most successful automatic verification techniques in the past two decades . it has been used in the analysis and verification of finite - state systems such as sequential circuit designs and communication protocols 模型检测技术是近二十年来最成功的自动验证技术之一,目前被广泛的应用于有穷状态系统(包括电路设计和通讯协议等)的分析与验证。
Due to the parallel global optimization characteristics of the genetic algorithm , the crossover using ant algorithm and genetic algorithm is adapted to generate the initialization vector of the sequential circuit , for avoiding the local optimization of ant algorithm 此外,为避免蚂蚁算法陷于局部最优,利用遗传算法具有并行全局寻优特点,将遗传算法与蚂蚁算法的交叉算法引入时序电路初始化矢量生成。
According to the redundancy in digital circuits , we investigate the diversified redundancy - restraining techniques for lower - power cmos circuits . to erase the redundant transition of the clock , the logic design of double - edge - triggered flip - flop is presented and applied in sequential circuit design 为消除时钟信号的兀余跳变,提出了利用时钟两个方向跳变的双边沿触发器逻辑发计并应用于时序电路设计中。